1. Field of the invention
The present invention relates to a PWM inverter apparatus for converting DC power to AC power or DC power.
2. Prior Art
Conventionally, in order to obtain AC voltage from a DC power supply, PWM inverter have widely been used. A PWM inverter is designed to alternate the polarity of voltage applied to a load by use of semiconductor switches to generate AC voltage. The PWM inverter is comprised of a plurality of semiconductor switches which are connected in a bridge and on-off controlled by driving outputs from a drive circuit. The driving output from the drive circuit alternatively turns on and off semiconductor switches which are diagonally disposed in the bridge circuit respectively, so that an AC voltage may be generated on both sides of the load. In FIG. 1, there is shown an example of an inverter circuit, including two semiconductor switching elements 2, 5 connected in series. The switching elements 2, 5 are connected in parallel with a DC power source 1. Additional two semiconductor switching elements 4, 3 connected in series each other are also respectively connected in parallel to the DC power source 1 and semiconductor switching elements 2, 5. Diodes D2, D3, D4, D5 are respectively connected in parallel to the switching elements 2, 3, 4, 5 such that their polarities are opposite to that of the DC power supply 1. A load 7 is connected between the point of connection between the switching elements 2, 5 and the point of connection between the switching elements 4, 3 through an output circuit 6 so as to configure a bridge circuit.
A control circuit 8 receives an output current or output voltage of the output circuit 6 as one of input signals. Current detectors are provided for delecting current flowing each of the switching elements 2, 3, 4, 5. Each the current detectors generates a current signal S12, S13, S14, S15 corresponding to the current in each of the switching elements, and these current signals S12, S13, S14, S15 are applied to the control circuit 8. The control circuit 8 generates switch control signals SS2, SS3, SS4, SS5 for controlling respective switching timings of the switching element 2, 3, 4, 5 in response to these input signals to control the operation of the switching elements 2, 3, 4, 5.
In this inverter circuit, the switching element 2 and the switching element 3 are paired and the switching element 4 and the switching element 5 are also paired. Thus, one and the other of pairs of switching elements are alternately turned on and off. It has been pointed out as one of the problems of this type of circuit that the switching period for turning on and turning off the semiconductor switching element is relatively long and this switching period results in a restriction in operating frequency, so that it is impossible to obtain an inverter circuit which can operate in high frequency.
Japanese Patent Laid-Open Publication No. Sho 60-174069 proposes, in an inverter circuit as shown in FIG. 1 to provide additional semiconductor switching elements of faster switching speed and of higher turn-on voltage connected in parallel to respective ones in one of the series-connected pairs of the semiconductor switching elements. Referring to the circuit shown in FIG. 1, the proposal is to connect additional semiconductor switches 12, 13 in parallel respectively with the semiconductor switching elements 4, 3. In the proposed inverter circuit, an output voltage is applied to the load by first applying a drive signal to the switching element 2 and then to the switching element 13 connected in parallel to the switching element 3, after the switching element 2 has completely become conductive. Then, immediately after the switching element 13 has completely become conductive, a drive signal is given to the switching element 3 connected in parallel to the switching element 13 to make the switching element 3 conductive. When the power supply from the DC power source 1 to the load is to be cut off, the drive signal to the switching element 3 is first cut off. Then, immediately after the current has been completely shifted to the switching element 13 connected in parallel to the switching element 3, the switching element 13 is turned off.
The construction and control of the inverter circuit described in the above Laid-Open Publication intends to reduce switching loss. However, in this circuit, the switching elements having faster switching speed and higher turn-on voltage are arranged in parallel only to two switching elements among 4 switching elements comprising the bridge circuit and no measure is taken to other two switching elements. Therefore, in case where the load is inductive, the switching elements having no such additional switching elements connected in parallel thereto may have no improvement in turn-on loss because circulating current still exists during the timing when these switching elements are to be turned on and off. Besides, drive signals for driving the switching elements require to be set up in proper order, resulting in increased difficulty of control.
Further, in an article titled "Noise-Free High Efficiency Inverter", the Institute of Electrical Engineers of Japan, Annual Conference of Industry Application Society, the collected papers No. 214, 1995, there is proposed to connect an Insulated Gate Bipolar Transistor (IGBT) having small switching loss but large conductive loss in parallel to a main transistor having small conductive loss but large switching loss, and a switching timing is controlled so that the IGBT is always turned on at the time when the main transistor is to be switched, for reducing both switching loss and conductive loss. In this proposed circuit and control, the minimum conduction time of the IGBT is determined by a sum of the switching time for turning on, the conduction time and the switching time for turning off of the main transistor. However, since the switching time of a conventional transistor is generally severalfold longer in comparison with the switching time of the IGBT, the control taught here cannot achieve the high frequency operation of inverters.